Design, implement, test, debug and document a stripped-down simulator for a demand-paged Virtual Memory Manager named vmm. Vmm assumes
computer science
Description
Summary:
Design, implement, test, debug and document a stripped-down simulator for a demand-paged Virtual Memory Manager named vmm. Vmm assumes a 32-bit, byte-addressable architecture with 4 kB aligned page frames. Run your program with your own brief, well thought-out inputs, but also use the input provided here. Only submit inputs and outputs of your test runs, no program sources, not the traces you may have used in your own debugging! As an alternative, you may skip implementing a SW simulation of this simplified VMM system, and perform all operations “by hand”. In this type of simulation you must still accurately count each memory-access related step. Either way, only submit for each “simulation run” all inputs and meaningful outputs
Abstract: Write a SW simulator of a Virtual Memory Manager named vmm. Vmm reads
memory requests (AKA loads and stores) from stdin and simulates memory actions and
page-related and timing aspects of memory accesses. Specifically, vmm measures the number
of memory cycles of any such simulated input program. Assumed, fixed cycles for memory
accesses are defined via constant numbers in this assignment; they are not varying
dynamically as they would in a real, loaded run-time system. Implement vmm with three levels
of 32-bit address mapping, using 10, 10 and 12 bits. Except for the Page Directory (PD) which
is implemented as a dedicated 4 kB-size cache, vmm operates without any data cache.
Accesses through the PD cost 1 cycle each.
