For this assignment you are required to implement a simple key and lock mechanism.
computer science
Description
Requirements:
For this assignment you are required to implement a simple key and lock mechanism. The key will be an octal digit (3 input bits, values 0..7). The lock will also be an octal digit (3 input bits, values 0..7). The key will fit the lock if its octal digit matches the octal digit of the lock.
Example 1: Key is 2 and Lock is 7. The numbers (2 and 7) do not match, the key does not unlock the lock.
Example 2: Key is 6 and lock is 3. The numbers (6 and 3) do not match, the key does not unlock the lock.
Example 3: Key is 5 and lock is 5. The numbers (5 and 5) match, the key unlocks the lock.
Note: These are just a couple of examples. There are more cases that result in the key unlocking the lock or failing to unlock the lock. Your circuit must correctly unlock or keep the lock locked for all cases.
For this assignment, the key will be represented by three inputs (3 bits). The three key inputs are named as K1, K2, and K3. The table below shows the assignment of bits to each key value for K1, K2, and K3.
Key value K1 K2 K3 0
0
0
0 1
0
0
1 2
0
1
0 3
0
1
1 4
1
0
0 5
1
0
1 6
1
1
0 7
1
1
1
Key Inputs
For this assignment, the lock will be represented by three inputs (3 bits). The three lock inputs are named as L1, L2, and L3. The table below shows the assignment of bits to each lock value for L1, L2, and L3.
Lock value L1 L2 L3 0
0
0
0 1
0
0
1 2
0
1
0 3
0
1
1 4
1
0
0 5
1
0
1 6
1
1
0 7
1
1
1
Lock Inputs
1007ICT/ 7611ICT Computer Systems and Networks
Assignment – Trimester 3, 2020
Page 5 of 6
Part A
Circuit Option 1: Part A Only (35 marks):
The implementation for this part must use only the three basic logic gates (AND, OR, NOT) with each of the gates having maximum 2 inputs.
You are required to implement a circuit in which the user (you) can input a key value (K1, K2, and K3) and a lock value (L1, L2, and L3) and the circuit decodes the K1, K2, K3 and L1, L2, L3 values using a decoder (see lecture notes) as well as other permitted logic gates to determine if the key matches the lock.
The output will be a single LED labelled OPEN which is lit if the key matches the lock, and is not lit if the key and lock are different.
